smp_boot_timeline.svg 7.8 KB

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  1. <svg xmlns="http://www.w3.org/2000/svg" width="1560" height="1100" viewBox="0 0 1560 1100">
  2. <defs>
  3. <style>
  4. .canvas { fill: #f8fafc; }
  5. .title { font-family: 'Segoe UI', Arial, sans-serif; font-size: 30px; font-weight: 700; fill: #0f172a; }
  6. .subtitle { font-family: 'Segoe UI', Arial, sans-serif; font-size: 16px; fill: #475569; }
  7. .lane-box { fill: #ffffff; stroke: #cbd5e1; stroke-width: 1.8; }
  8. .lane-title { font-family: 'Segoe UI', Arial, sans-serif; font-size: 15px; font-weight: 700; fill: #0f172a; }
  9. .lane-subtitle { font-family: 'Segoe UI', Arial, sans-serif; font-size: 11px; fill: #64748b; }
  10. .lane-line { stroke: #cbd5e1; stroke-width: 2; stroke-dasharray: 8 8; }
  11. .event { stroke: #334155; stroke-width: 2.3; fill: none; }
  12. .event-alt { stroke: #0f766e; stroke-width: 2.3; fill: none; }
  13. .event-join { stroke: #7c3aed; stroke-width: 2.3; fill: none; }
  14. .event-label { font-family: 'Segoe UI', Arial, sans-serif; font-size: 12px; fill: #334155; font-weight: 600; }
  15. .step { fill: #0f172a; }
  16. .step-text { font-family: 'Segoe UI', Arial, sans-serif; font-size: 12px; font-weight: 700; fill: #ffffff; }
  17. .callout { fill: #ffffff; stroke: #cbd5e1; stroke-width: 1.7; }
  18. .callout-title { font-family: 'Segoe UI', Arial, sans-serif; font-size: 14px; font-weight: 700; fill: #0f172a; }
  19. .callout-text { font-family: 'Segoe UI', Arial, sans-serif; font-size: 12px; fill: #475569; }
  20. </style>
  21. <marker id="arrowhead" markerWidth="10" markerHeight="10" refX="8" refY="5" orient="auto">
  22. <path d="M 0 0 L 10 5 L 0 10 z" fill="#334155"/>
  23. </marker>
  24. <marker id="arrowhead-alt" markerWidth="10" markerHeight="10" refX="8" refY="5" orient="auto">
  25. <path d="M 0 0 L 10 5 L 0 10 z" fill="#0f766e"/>
  26. </marker>
  27. <marker id="arrowhead-join" markerWidth="10" markerHeight="10" refX="8" refY="5" orient="auto">
  28. <path d="M 0 0 L 10 5 L 0 10 z" fill="#7c3aed"/>
  29. </marker>
  30. </defs>
  31. <rect class="canvas" x="0" y="0" width="1560" height="1100"/>
  32. <text class="title" x="60" y="58">QEMU virt64 AArch64 SMP Bring-up Timeline</text>
  33. <text class="subtitle" x="60" y="88">CPU0 enters the scheduler first, then main_thread_entry wakes the remaining CPUs through PSCI.</text>
  34. <rect class="lane-box" x="60" y="120" width="190" height="72" rx="18" ry="18"/>
  35. <text class="lane-title" x="155" y="150" text-anchor="middle">Firmware / PSCI</text>
  36. <text class="lane-subtitle" x="155" y="171" text-anchor="middle">BootROM, BL1, CPU_ON handler</text>
  37. <rect class="lane-box" x="300" y="120" width="190" height="72" rx="18" ry="18"/>
  38. <text class="lane-title" x="395" y="150" text-anchor="middle">Boot CPU ASM</text>
  39. <text class="lane-subtitle" x="395" y="171" text-anchor="middle">entry_point.S</text>
  40. <rect class="lane-box" x="540" y="120" width="190" height="72" rx="18" ry="18"/>
  41. <text class="lane-title" x="635" y="150" text-anchor="middle">Boot CPU C</text>
  42. <text class="lane-subtitle" x="635" y="171" text-anchor="middle">components.c / setup.c</text>
  43. <rect class="lane-box" x="780" y="120" width="190" height="72" rx="18" ry="18"/>
  44. <text class="lane-title" x="875" y="150" text-anchor="middle">Secondary CPU ASM</text>
  45. <text class="lane-subtitle" x="875" y="171" text-anchor="middle">_secondary_cpu_entry</text>
  46. <rect class="lane-box" x="1020" y="120" width="190" height="72" rx="18" ry="18"/>
  47. <text class="lane-title" x="1115" y="150" text-anchor="middle">Secondary CPU C</text>
  48. <text class="lane-subtitle" x="1115" y="171" text-anchor="middle">rt_hw_secondary_cpu_bsp_start</text>
  49. <rect class="lane-box" x="1260" y="120" width="190" height="72" rx="18" ry="18"/>
  50. <text class="lane-title" x="1355" y="150" text-anchor="middle">Scheduler</text>
  51. <text class="lane-subtitle" x="1355" y="171" text-anchor="middle">CPU0 first, then CPU1..N-1</text>
  52. <line class="lane-line" x1="155" y1="210" x2="155" y2="980"/>
  53. <line class="lane-line" x1="395" y1="210" x2="395" y2="980"/>
  54. <line class="lane-line" x1="635" y1="210" x2="635" y2="980"/>
  55. <line class="lane-line" x1="875" y1="210" x2="875" y2="980"/>
  56. <line class="lane-line" x1="1115" y1="210" x2="1115" y2="980"/>
  57. <line class="lane-line" x1="1355" y1="210" x2="1355" y2="980"/>
  58. <circle class="step" cx="250" cy="250" r="15"/>
  59. <text class="step-text" x="250" y="254" text-anchor="middle">1</text>
  60. <line class="event" x1="155" y1="250" x2="395" y2="250" marker-end="url(#arrowhead)"/>
  61. <text class="event-label" x="275" y="238" text-anchor="middle">jump to _start, x0 = DTB</text>
  62. <circle class="step" cx="485" cy="340" r="15"/>
  63. <text class="step-text" x="485" y="344" text-anchor="middle">2</text>
  64. <path class="event" d="M 395 340 h 90 v 34 h -90" marker-end="url(#arrowhead)"/>
  65. <text class="event-label" x="505" y="329">EL1h, clear BSS, set SP_EL1, enable early MMU</text>
  66. <circle class="step" cx="520" cy="435" r="15"/>
  67. <text class="step-text" x="520" y="439" text-anchor="middle">3</text>
  68. <line class="event" x1="395" y1="435" x2="635" y2="435" marker-end="url(#arrowhead)"/>
  69. <text class="event-label" x="520" y="423" text-anchor="middle">branch to rtthread_startup()</text>
  70. <circle class="step" cx="725" cy="530" r="15"/>
  71. <text class="step-text" x="725" y="534" text-anchor="middle">4</text>
  72. <path class="event" d="M 635 530 h 90 v 34 h -90" marker-end="url(#arrowhead)"/>
  73. <text class="event-label" x="747" y="518">rt_hw_common_setup: full MMU, GIC, UART, GTIMER, SMP IPI</text>
  74. <circle class="step" cx="970" cy="625" r="15"/>
  75. <text class="step-text" x="970" y="629" text-anchor="middle">5</text>
  76. <line class="event" x1="635" y1="625" x2="1355" y2="625" marker-end="url(#arrowhead)"/>
  77. <text class="event-label" x="995" y="613" text-anchor="middle">rt_system_scheduler_start() on CPU0</text>
  78. <circle class="step" cx="970" cy="715" r="15"/>
  79. <text class="step-text" x="970" y="719" text-anchor="middle">6</text>
  80. <line class="event-join" x1="1355" y1="715" x2="635" y2="715" marker-end="url(#arrowhead-join)"/>
  81. <text class="event-label" x="995" y="703" text-anchor="middle">main_thread_entry becomes the first running thread</text>
  82. <circle class="step" cx="395" cy="805" r="15"/>
  83. <text class="step-text" x="395" y="809" text-anchor="middle">7</text>
  84. <line class="event-alt" x1="635" y1="805" x2="155" y2="805" marker-end="url(#arrowhead-alt)"/>
  85. <text class="event-label" x="395" y="793" text-anchor="middle">rt_hw_secondary_cpu_up(): resolve entry PA and issue CPU_ON</text>
  86. <circle class="step" cx="515" cy="895" r="15"/>
  87. <text class="step-text" x="515" y="899" text-anchor="middle">8</text>
  88. <line class="event-alt" x1="155" y1="895" x2="875" y2="895" marker-end="url(#arrowhead-alt)"/>
  89. <text class="event-label" x="515" y="883" text-anchor="middle">firmware wakes the target core at _secondary_cpu_entry</text>
  90. <circle class="step" cx="960" cy="960" r="15"/>
  91. <text class="step-text" x="960" y="964" text-anchor="middle">9</text>
  92. <path class="event" d="M 875 960 h 85 v 34 h -85" marker-end="url(#arrowhead)"/>
  93. <text class="event-label" x="982" y="948">read MPIDR, set TPIDR/stack, reuse early MMU</text>
  94. <circle class="step" cx="990" cy="1035" r="15"/>
  95. <text class="step-text" x="990" y="1039" text-anchor="middle">10</text>
  96. <line class="event" x1="875" y1="1035" x2="1115" y2="1035" marker-end="url(#arrowhead)"/>
  97. <text class="event-label" x="995" y="1023" text-anchor="middle">branch to rt_hw_secondary_cpu_bsp_start()</text>
  98. <rect class="callout" x="1230" y="860" width="260" height="90" rx="18" ry="18"/>
  99. <text class="callout-title" x="1360" y="892" text-anchor="middle">Convergence point</text>
  100. <text class="callout-text" x="1360" y="916" text-anchor="middle">CPU0 arrives first through rtthread_startup().</text>
  101. <text class="callout-text" x="1360" y="934" text-anchor="middle">CPU1..N-1 join after local BSP initialization.</text>
  102. </svg>