smp_boot_overview.svg 18 KB

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  109. id="text3">QEMU virt64 AArch64 SMP Boot Overview</text>
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  114. id="text4">CPU0 completes the shared platform bring-up first, then wakes the remaining CPUs and all cores join the same scheduler.</text>
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  182. id="text9">1</text>
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  194. id="text11">QEMU firmware handoff</text>
  195. <text
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  197. x="175"
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  199. text-anchor="middle"
  200. id="text12">Load the image and jump to _start.</text>
  201. <text
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  204. y="284"
  205. text-anchor="middle"
  206. id="text13">x0 carries the DTB physical address.</text>
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  227. id="text14">2</text>
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  240. <text
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  245. id="text17">Kernel entry for CPU0.</text>
  246. <text
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  251. id="text18">Sets up the first control flow.</text>
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  272. id="text19">3</text>
  273. <text
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  278. id="text20">Early assembly setup</text>
  279. <text
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  284. id="text21">init_cpu_el / init_kernel_bss / init_cpu_stack_early</text>
  285. <text
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  290. id="text22">Synchronize to EL1h, clear BSS, set SP_EL1.</text>
  291. <text
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  296. id="text23">Save the FDT and enable the early MMU map.</text>
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  317. id="text24">4</text>
  318. <text
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  335. id="text27">Disable local IRQs and start the</text>
  336. <text
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  341. id="text28">kernel initialization backbone.</text>
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  362. id="text29">5</text>
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  375. <text
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  380. id="text32">Build the full MMU map, memblock, and heap.</text>
  381. <text
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  386. id="text33">Initialize GIC, UART, GTIMER, and SMP IPIs.</text>
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  407. id="text34">6</text>
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  425. id="text37">The main thread becomes the first runnable task.</text>
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  509. id="text46">Resolve PA(_secondary_cpu_entry).</text>
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  621. id="text56">Read MPIDR, find the logical CPU id,</text>
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